I’m trying to reconcile the #define NVME_MAX_XFER_SIZE and leading comment:
* For commands requiring more than 2 PRP entries, one PRP will be
* embedded in the command (prp1), and the rest of the PRP entries
* will be in a list pointed to by the command (prp2). This means
* that real max number of PRP entries we support is 506+1, which
* results in a max xfer size of 506*PAGE_SIZE.
in lib/nvme/nvme_pcie.c with my interpretation from reading the NVMe spec. I’d greatly
appreciate if someone could “show me the math” or otherwise help me to understand this.
How was NVME_MAX_PRP_LIST_ENTRIES (506) derived? I don’t know if I’m lost in the
semantics of the naming, the comment, or perhaps there’s a nuance in the “…we support…”
part. I would’ve guessed, otherwise, that the max # of PRP entries would be a function of
I did see that the driver in nvme_ctrlr_identify() compares this derived maximum transfer
size with that which the controller can actually support as reported in the Identify
Controller structure, choosing the minimum of the two values, but that’s understood and
separate from the above.